Upstream work (PCIE3.0 working) progress on RK3588

Currently we’re using the very crappy RockChip vendor kernel, and Sebastian Reichel from Collabora is working with RK on upstreaming the whole RK3588 SoC.

Currently his branch has working UART/MEM/eMMC/GMAC(?)/SDCARD device tree.

But as a Rock5B user, non of them really makes much sense, as the R8125 is attached to a PCIE2.0 lane, and I’m booting from NVME.

Thus I spent my hackweek working on bringing up the PCIE controller.
So far, PCIE2.0 lanes doesn’t work at all, but the PCIE3.0 lanes works as expected.

Here comes the proof, upstream v6.2-rc, with my branch at github:

And the picture (from minicom, unfortunately no network yet), containing neofetch, kernel version, lspci and lsblk:

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So far the PCIE3.0 phy and controller can reuse the rk3568 drivers.

But the combo phy driver does not only need a new grfcfg array, but also extra code for initialization.
Although I did the port, the pcie controller at 0xfe17000 still hangs at initialization.

Would dig it deeper, and at least enable the r8125 so I can do my daily aarch64 work on it.

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